Characterization and modeling of resistive memories based on mis and mim structures

Resumen

Nowadays, the electronics industry is increasing its interest for volatile (temporary) and non-volatile (permanent) data storage. This fact arrives from the needs connected to 5G circuits, solid-state drives (SSD), artificial intelligence, data mining, internet of things (IoT) devices and cloud storage apart from laptops and smartphones [Gupta2019]. Resistive memories or Resistive Random Access Memories (RRAM) technology is thought to fit well for these needs. RRAM devices are one of the most promising emerging technologies due to its outstanding features such as low operation voltage, low power consumption, CMOS compatibility in the Back-End-of-Line (BEOL), non-volatility, good endurance [Lanza2021] and retention and the capability to be fabricated in 3D stacks since its architecture is quite simple [Lanza2019, Gupta2019, Munjal2019, Pan2014, Ielmini2016, Xie2013, Lee2015, Spiga2020, Waser2010, Waser2012]. These properties make RRAM devices the perfect candidate so substitute the dominant technology in the current non-volatile realm: flash memories. The latter ones are part of the Non-Volatile Memories family (NVM), devices that store information without the need of an external power system to keep the information. Flash technology has advantages such as low cost, high density and reliability, but also some important constraints which might affect its future: low durability, leakage, low operation speed and the need of high operation voltages that results in high power consumption. In the realm of NVM memories there are also other candidates to compete with RRAMs, the most relevant are Spin-Transfer Torque RAMs (STT-RAMs, a type of magnetic memories) and Phase Change Memories (PCM), both of them being thoroughly studied by the international electronic community due to the increasingly need for storage of the information all around the world [Xie2013]. This comes from the fact that current electronic devices for NVM are required to show retention times greater than a few years, to have low energy consumption and also offer low latency times. The target on NVM is focused on two main issues: 1. Reasonably low operation speed in relation to DRAM and SRAM. If this hurdle is overcome, they could easily replace them in the future for some purposes, and in doing so, take leadership on part of the market [Xie2014]. 2. Low power operation [Xie2014]. NVM are commonly employed in daily applications such as laptops, smartphones, videogames, scientific equipment, robotic components, etc. Nevertheless, flash technology, the current market leader, will come to an end sooner or later and some action is required [Gupta2019, Xie2013, Xie2014, Waser2007, Waser2010, Waser2012]. In this context, RRAM memories, which are based on a hysteretic operation called resistive switching (RS), rise as one of the most suitable replacements in contrast to another emerging technologies as PCM memories, Magnetic RAMs (MRAMs) or STT RAM memories [Lanza2019, Xie2014, Waser2007, Waser2010]. If the upcoming devices are based on RRAMs instead on other technologies, the electronics paradigm is expected to lead to a breath-taking revolution: there would be applications never seen before due to the possibility to build and develop new computer architectures much powerful than the most commonly fabricated today following the von Neumann architecture [Wang2019]. RRAM fabrication is mainly based on two structures, Metal-Insulator-Metal (MIM), and Metal Insulator Semiconductor (MIS). The insulating material in between the electrodes consists of a dielectric whose properties allow its resistance to be changed, a mechanism known as resistive switching [Lanza2019, Gupta2019, Waser2012, Munjal2019, Carboni2019]. Among the materials employed are the following: 1. Transition metal oxides (TMO) as HfO2 or TiO2. 2. Perovskite family showing paraelectric, ferroelectric, multiferroelectric and magnetic behavior. 3. Graphene oxides as hexagonal boron nitride (h-BN) along with another two-dimensional materials. In the past years, great results have been obtained both at device and circuit level, allowing to design and fabricate a 16 GBs integrated RRAM memory circuit [Zahurak2014] or a 4 GBs memory device in 24 nm CMOS technology [Liu2013]. The foundry TSMC has recently planned to offer embedded RRAM at both 40 nm and 22 nm nodes, this technology is capable of 10-year retention at 125ºC and over 10000 cycles of endurance (suggesting using TiO2 as dielectric [TSMC2020]). These facts allow to consider this technology a real candidate in the near future for massive NVM industrial manufacturing, granting embedded storage class memory in processors and microcontrollers. Even so, there are still some impediments to surpass before reaching the massive market regime for this technology: to begin with, the variability linked to the fabrication process which makes differences between two identical devices (device-to-device) along with the inherent variability during cycling in the same device (cycle-to-cycle). The latter is associated to the physics behind the RS process [Lanza2019, Pan2014]. For the characterization of RS and the study of the physics behind, both device simulators and compact models are needed. In particular, in the physical simulator context, there can be found the kinetic Monte Carlo (kMC) simulators, where the device operation is described in detail, according to the physical mechanisms involved at the atomic level [Aldana2020, Padovani2015, Dirkmann2018, Guy2015]. At the modeling level, advanced statistical modeling [Pérez2019, Mikhaylov2021, Alonso2021, Roldán2019] and the compact modeling approach for circuit simulation, where the device description is faster and compact [Huang2013, Chen2015, Bocquet2014, Picos2015, Maldonado2019, Guan2012, Jiang2016, Roldán2021, González-Cordero2017], can be found. In this work we deal with several RRAM technologies. We perform different characterization techniques, including the electrical analysis of devices within magnetic fields. We have analysed the measurement data to obtain compact models and implement them in circuit simulators by means of SPICE macromodels and Verilog-A (including parameter extraction techniques). We have also developed a device simulator using circuit breakers. With all these measurements and software tools we have studied RS in all the devices analysed and their variability, among other issues. The efforts in this doctoral thesis have been focused on the characterization and modeling of memristive devices fabricated using different technologies. Among all the memristive devices, we will focus on resistive random access memories (RRAM), also known as resistive memories. To do so, devices based on metal-insulator-metal and metal-insulator-semiconductor structures have been studied in depth. A simulator based on circuit breakers has also been developed and tested to analyse RRAM variability and operation. This PhD dissertation (a compilation work) includes 7 publications in scientific journals indexed in the Journal Citation Report of Science Citation Index, one proceeding published in IEEE Xplore digital library and one contribution to an International Conference. I have also contributed to other publications outside this work, including a book chapter and a video explaining the operation of the simulator. The outline of this work is the following: Chapter 1 exposes the state of the art of resistive memories; in particular, we will focus on the resistive switching operation and its modeling and simulation. To begin with, the fundamentals of this technology are presented along the main applications. The current situation of flash devices and their limitations is also exposed as these new devices are emerging to replace them. Therefore, the most important features to describe in RRAM devices such as structure, fabrication process and materials employed are tackled. In addition, the main hurdles to address in order to reach a full development of this technology and a massive commercial fabrication are explained. Compact modeling and simulation tools are also described in the last section of the chapter since they are of great interest in these devices because they are still in their infancy. Chapter 2 deals with the electrical characterization of RRAMs. Additional effects like the magnetic field are included during conventional measurements processes. Besides, statistical techniques are applied to the extracted experimental RS parameters to be analyzed in the context of the charge and flux domain. Chapter 3 introduces the time series analysis for studying variability in resistive memories. By using this versatile and advanced technique, different kind of devices based on traditional 3D stacks such as Ni/HfO2/Si-n+, Cu/HfO2/Si-n+ and Au/Ti/TiO2/SiOx/Si-n+ are tackled. Furthermore, novel memristors based on 2D materials, namely h-BN, are also considered. Chapter 4 describes the extraction of the series resistance in HfO2 based RRAMs and the inclusion of this parameter in an enhanced version of the Stanford model (implemented in Verilog-A) to ease the fitting of some type of experimental curves. Besides, the quantum point contact model has been modified to account for thermal effects to determine their role. Chapter 5 exposes the Dynamic Route Map as a powerful tool to study the temporal behavior of reset transitions in TiN/Ti/HfO2 devices. Different inputs have been employed to show that a unique surface is created to define the operation regime of a device supported with experimental data. Chapter 6 focuses on the simulation of resistive memories. In particular, a simulator tool based on circuit breakers has been developed from scratch in order to analyze variability and the stochastic behavior of these devices to explain the physics behind RS. Chapter 7 compiles the main conclusions of this doctoral thesis and the future improvements.